Lana Josipović

Prof. Lana Josipović is a Professor in the Department of Electrical Engineering at ETH Zurich. Her research interests include electronic design automation, reconfigurable computing, high-level synthesis, compilers, digital circuits, and computer architecture. She is affiliated with ETH Zurich's Electrical Engineering department and maintains a profile page at https://ee.ethz.ch/the-department/people-a-z/person-detail.MjkzOTAw.TGlzdC8zMjc5LC0xNjUwNTg5ODIw.html.

Lana Josipović is a researcher at ETH Zurich with expertise in reconfigurable computing, electronic design automation, high-level synthesis, and logic synthesis. Her work focuses on advancing high-level synthesis techniques to generate high-performance dataflow circuits from C/C++ code. Josipović's research explores dynamic and static scheduling strategies, buffer placement, load-store queue optimization, and resource sharing in dataflow architectures. She has contributed to the development of methodologies for synthesizing general-purpose code into dynamically scheduled circuits and improving timing accuracy through comprehensive timing models. Her publications highlight efforts to enhance parallelism, reduce excessive dynamism, and enable more out-of-order execution in dataflow circuits.