Shinya Takamaeda

Shinya Takamaeda is a professor at the University of Tokyo, Department of Computer Science. His research interests include Computer Architecture, High-Level Synthesis Compiler, FPGA System, Algorithm/Hardware Co-design, and Machine Learning Acceleration. The CASYS laboratory, under his leadership, focuses on next-generation computing technologies such as custom computing with domain-specific architecture, algorithm/system co-design for machine learning, and high-level synthesis compilers for hardware design. The lab also engages in software research on compilers and programming models for user-friendly computers.

Shinya Takamaeda-Yamazaki is a researcher at The University of Tokyo and RIKEN AIP, focusing on Computer Architecture, Hardware Design Technology, and Machine Learning System. His work explores innovative hardware solutions for accelerating deep neural networks and combinatorial optimization. Key projects include BRein memory, a reconfigurable in-memory accelerator, and QUEST, a DNN inference engine utilizing 3D SRAM and inductive coupling. He also develops tools like Pyverilog for hardware design processing and investigates architectures such as STATICA for full-digital annealing. His research emphasizes energy efficiency, performance, and hardware-software co-optimization for real-time applications.